Chaniplexer Memory Architecture

Chaniplexer is a scheme for high-speed controller to memory interface that uses Supercharged Copper interconnection technology with a proprietary multiplexing method to reduce the number of high-speed memory interconnections from 100 lines to 20.

Seriplexer Memory Architecture

Seriplexer is a proprietary configuration which multiplexes parallel to serial bus interconnection to improve performance and reduce noise for parallel memories. .